Cache-Aware Instruction SPM Allocation for Hard Real-Time Systems

To improve the execution time of a program, parts of its instructions can be allocated to a fast Scratchpad Memory (SPM) at compile time. This is a well-known technique which can be used to minimize the program's worst-case Execution Time (WCET). However, modern embedded systems often use cached main memories. An SPM allocation will inevitably lead to changes in the program's memory layout in main memory, resulting in either improved or degraded worst-case caching behavior. We tackle this issue by proposing a cache-aware SPM allocation algorithm based on integer-linear programming which accounts for changes in the worst-case cache miss behavior

Schedulability-oriented code optimization of hard real-time multitasking systems

Die vorliegende Arbeit beschäftigt sich mit der compilergestützten Optimierung eingebetteter harter Echtzeitsysteme mit mehreren Prozessen. Zwei Modelle basierend auf ganzzahlig-linearer Programmierung und einem genetischen Algorithmus werden genutzt, um Systeme gezielt hinsichtlich iherer Zeitschranken zu optimieren. Die Arbeit vereinigt dabei Erkenntnisse aus der systemnahen Planbarkeitsanalyse mit Konzepten der compilerbasierten Code-Optimierung.This thesis tackles the compiler-based optimization of embedded hard real-time systems featuring multiple processes. It presents two models, based on integer-linear programming and a genetic algorithm. They can be used in order to optimize a given multitasking system specifically with respect to its timing requirements. The thesis thereby unites system-level schedulability analysis with concepts from compiler-based code optimization

Evaluating the performance of solvers for integer-linear programming

Optimizing embedded systems often boils down to solving complex combinatorial optimization problems. Integer-Linear Programming (ILP) turned out to be a powerful tool to solve these problems, as beyond traditional constraints, Boolean variables may be used to model complex logical expressions and conditionals. One of the key technical aspects is to be able to efficiently express these relations within the ILP. This paper presents formalized solutions for these issues, as well as an assessment of common ILP solvers. Additionally, the performance impact is illustrated using a compiler based cache aging optimization.Deutsche Forschungsgemeinschaf

Measuring and modeling energy consumption of embedded systems for optimizing compilers

Estimating energy consumption already during development as precisely as possible is crucial for many embedded system designs. These energy estimates should be expressed such that they can be used by subsequent automated optimizations during the compilation phase in order to minimize the expected energy consumption. In this paper we present our current approach on measuring and modeling, and subsequently using the derived energy estimates. Our model is implemented within an optimizing compiler, allowing for future energy focused compiler optimizations

Compiling for the worst case : memory allocation for multi-task and multi-core hard real-time systems

Modern embedded hard real-time systems feature multiple tasks running on multiple processing cores. Schedulability analysis of such systems is usually performed on an abstract system level with each task being represented as a black box with fixed timing properties. If timing constraints are violated, optimizing the system on a code-level in order to achieve schedulability is a tedious task. To tackle this issue, we propose an extension to the WCET-Aware C Compiler framework WCC. We integrated an optimization framework based on Integer-Linear Programming into the WCC which is able to optimize a multi-core system with multiple tasks running on each core with regards to its schedulability. We evaluate the framework by providing two approaches on a schedulability aware static Scratchpad Memory (SPM) allocation: One based on Integer-Linear Programming (ILP) and one based on a genetic algorithm

Bus-aware static instruction SPM allocation for multicore hard real-time systems

Over the past years, multicore systems emerged into the domain of hard real-time systems. These systems introduce common buses and shared memories which heavily influence the timing behavior. We show that existing WCET optimizations may lead to suboptimal results when applied to multicore setups. Additionally we provide both a genetic and a precise Integer Linear Programming (ILP)-based static instruction scratchpad memory allocation optimization which are capable of exploiting multicore properties, resulting in a WCET reduction of 26% in average compared with a bus-unaware optimization. Furthermore, we show that our ILP-based optimization's average runtime is distinctively lower in comparison to the genetic approach. Although limiting the number of tasks per core to one and partially exploiting private instruction SPMs, we cover the most crucial elements of a multicore setup: the interconnection and shared resources.This work received funding from Deutsche Forschungsgemeinschaft (DFG) under grant FA 1017/1-2. This work was partially supported by COST Action IC1202: Timing Analysis On Code-Level (TACLe)

Compilation for real-time systems : an overview of the WCET-aware C compiler WCC

Traditionell finden Design und zeitliche Analyse eines eingebetteten harten Echtzeitsystems getrennt voneinander statt. Dies führt zu einem komplexen Designfluss, der menschliche Interaktion benötigt. Weiter optimieren Standardcompiler in Bezug auf die durchschnittliche Performanz, so dass der Systemdesigner nicht bei der Optimierung hinsichtlich der schlimmstmöglichen Programmlaufzeit unterstützt wird. Der WCET-Aware C Compiler WCC verbessert diese Situation, indem Planbarkeitsanalysen eng in den Compilierungs- und Optimierungsprozess mit eingebuden werden. Weiter bietet der Compiler gezielte Möglichkeiten um echtzeitbewusst Optimierungen durchzuführen und dabei gezielt mikroarchitekturelle Eigenschaften der jeweiligen Zielarchitektur auszunutzen. Hierdurch kann automatisiert Programmcode für Mehrprozess- und Mehrprozessor-systeme erzeugt erden, der alle Zeitschranken einhält.Traditionally, design of embedded hard real-time software and timing analysis are decoupled from each other, leading to complicated design flows involving human interaction. Furthermore, traditional compilers optimize for average-case performance so that no tool support exists supporting the designer to systematically reduce Worst-Case Execution Times in case that deadlines are missed. The WCET-Aware C Compiler WCC improves this situation by tightly schedulability analyses into the compilation and optimization flow. Furthermore, the compiler features dedicated real-time aware optimizations and exploits detailed architectural knowledge so that schedulable code meeting deadlines can be generated automatically, even for multitask or multicore systems.Deutsche Forschungsgemeinschaft (DFG

Favorable adjustment of periods for reduced hyperperiods in real-time systems

The hyperperiod defines the time span after which the temporal behavior of a periodical real-time system repeats. It is the key property which determines the complexity of both analysis and exhaustive simulation of a given system. Unfortunately, the hyperperiod may easily become very large. We introduce an ILP-based approach to modify the periods in a task set according to user constraints to retrieve an optimal solution for a drastically reduced hyperperiod.Deutsche Forschungsgemeinschaf

Automated generation of time-predictable executables on multi-core

International audienceIn this paper, we are interested in the implementation of control- command applications, such as the flight control system of an aircraft for instance, on multi-core hardware. Due to certification and safety issues, time-predictability – in the sense that the timing behavior must be analysable and validable off-line – is a mandatory feature. We present a complete framework, from high-level system specification in synchronous languages, to implementation on a multi-core hardware platform, which enforces time-predictability at every step of the development process. The framework is based on automated code generation tools to speed-up the development process and to eliminate error-prone human-made translation steps